Bohdan Kondratenko

SPI_nRF.h

					
/*
 * SPI_nRF.h
 *
 * Created: 23.04.2022 13:36:59
 *  Author: Bohdan
 *
 * nRF Pin description (from the "nRF-Side"):
 *		1. GND– Ground
		2. Vcc   – Supply Voltage (1.9 V – 3.6 V)
		3. CE pin is always input with respect to the 24L01. It is used to control RADIO data transmission
 and reception when in TX and RX modes, respectively.
		4. CSN stands for chip select not. This is the enable pin for the SPI bus, and it is active low (hence the “not” in the name). 
	You always want to keep this pin high except when you are sending the device an SPI command or getting data on the SPI bus from the chip. 
	When this pin goes low, the 24L01 begins listening on its SPI port for data and processes it accordingly.
		5. SCK is the serial clock for the SPI bus. When you configure your SPI bus, SCK should stay low normally (rising edges are active), 
	and the clock samples data in the middle of data bits.
		6. MOSI stands for “master out, slave in,” and from both the microcontroller’s and the 24L01’s perspectives, 
	the master is the microcontroller and the slave is the 24L01. This is because the 24L01 never sends data without first being requested by the microcontroller. 
	Essentially, this pin is the side of the bus on which the master (the microcontroller) sends data to the slave (the 24L01). 
	It is also connected to the MOSI pin on your microcontroller’s SPI interface.
		7. MISO pin is like the MOSI pin, but backwards. This pin is the side of the bus on which the slave (the 24L01) sends data to the master (the microcontroller).
		8. IRQ is the interrupt pin and is active-low. There are three internal interrupts that can cause this pin to go low when they are active.
 */ 


#ifndef SPI_NRF_H_
#define SPI_NRF_H_

#include <xc.h>
#include <stdint.h>

/*
 * Frequency of the nRF-Module
 */
typedef enum
{
	F_1Mbps = 0b00,
	F_2Mbps = 0b01, 
	F_250kbps = 0b10
} rf_freq;

/*
 * Power mode of the nRF module
 */
typedef enum
{
	PWR_m18dBm = 0b00,  // -18dBm
	PWR_m12dBm = 0b01,  // -12dBm
	PWR_m6dBm = 0b10,   // -6dBm
	PWR_m0dBm = 0b11    // -0dBm
} rf_pwr;

/*
 *
 */
typedef enum
{
	receiver = 0x00,
	transmitter = 0x01
} rf_mode;

/*
 * Structure to store settings of SPI and other data for nRF Module
 */
typedef struct
{
	rf_freq F_Khz;
	rf_pwr PWR;
	rf_mode mode;
	//pin_t SS_pin;
	pin_t CE_pin;
	pin_t CSN_pin;
	
	uint8_t Data_byte;  // The byte of data that will be received from the nRF (an array needed?)
} nRF_t;

void nRF_setup(nRF_t* nRF, rf_freq _f_kHz, rf_pwr _pwr, rf_mode _mode, pin_t _CE_pin, pin_t _CSN_pin);
uint8_t SPI_TR_Byte(nRF_t* nRF, uint8_t cData);
void SPI_TR_str(nRF_t* nRF, uint8_t* arr, uint8_t length);

/************** Functions from the Table 20, Page 51, Document "nRF24L01P_Product_Specification_1_0.pdf" **************/
uint8_t R_REGISTER(nRF_t* nRF, uint8_t cData);
void W_REGISTER(nRF_t* nRF, uint8_t register_addr, uint8_t data);
void R_RX_PAYLOAD(nRF_t* nRF);
void W_TX_PAYLOAD(nRF_t* nRF);
void FLUSH_TX(nRF_t* nRF);
void FLUSH_RX(nRF_t* nRF);
void REUSE_TX_PL(nRF_t* nRF);
void R_RX_PL_WID(nRF_t* nRF);
void W_ACK_PAYLOAD(nRF_t* nRF);
void W_TX_PAYLOAD_NOACK(nRF_t* nRF);
uint8_t NOP(nRF_t* nRF);

#endif /* SPI_H_ */